====== Chip Design Agents: Agentic EDA ======

The semiconductor industry faces a growing "productivity gap" as chip complexity outpaces design team capacity. LLM agents are emerging as autonomous engineers for Electronic Design Automation (EDA), handling RTL generation, verification, synthesis, and physical design. The **"Dawn of Agentic EDA"** survey (2026) provides the first systematic framework, while **MAVF** (2025) demonstrates multi-agent IC verification in practice.

===== The Cognitive Stack Architecture =====

The Dawn of Agentic EDA survey frames chip design agents through a three-layer **Cognitive Stack** that maps LLM capabilities to EDA workflows:

**Perception Layer:** Aligns multimodal inputs -- netlists, timing constraints, layout images, design rule documents -- using foundation models or vision-language models (VLMs) for semantic understanding of hardware artifacts.

**Cognition Layer (Reasoning and Planning):** The neuro-symbolic bridge resolving the tension between probabilistic LLMs and deterministic physical constraints. Key techniques include:
  * **ReAct** (Reasoning + Acting) for iterative design exploration
  * **Chain-of-Thought (CoT)** for multi-step design decisions
  * **Hierarchical planning** in multi-agent systems with manager/critic roles
  * **Domain-specific RAG** for DRC rules, error logs, and design specifications
  * **Long-horizon memory** to prevent "design intent drift" across lengthy design cycles

**Action Layer (Tool Execution):** Natural language to script translation for EDA tools (Synopsys, Cadence, etc.), with sandboxing, rollback capabilities, and error logs serving as gradient signals for agent improvement.

===== Key Principle: Agents as Heuristic Search Engines =====

A central insight of the survey is the **probabilistic vs. deterministic paradox**: LLMs are probabilistic, but chip design demands deterministic correctness. The resolution is that agents handle //exploration// (design space search, strategy selection) while traditional EDA tools handle //exploitation// (formal verification, SPICE simulation, synthesis):

$$\text{Agent}(\text{explore}) + \text{Tool}(\text{verify}) = \text{Correct Design}$$

===== MAVF: Multi-Agent Verification Framework =====

MAVF (arXiv:2507.21694) addresses chip verification -- the most time-consuming bottleneck in IC development. It transforms design specifications into verified testbenches through collaborative specialized agents:

  * **Specification Parser Agent:** Extracts formal requirements from natural language design documents
  * **Verification Strategy Agent:** Generates coverage plans, assertion strategies, and test scenarios
  * **Code Implementation Agent:** Produces SystemVerilog testbenches, assertions, and coverage models

MAVF significantly outperforms both manual verification methods and single-LLM approaches in testbench generation quality and specification coverage.

===== Code Example: Agentic EDA Pipeline =====

<code python>
class AgenticEDAPipeline:
    def __init__(self, llm, eda_tools, design_rag):
        self.llm = llm
        self.eda_tools = eda_tools
        self.rag = design_rag
        self.memory = DesignMemory()

    def rtl_generation(self, spec_nl):
        context = self.rag.retrieve(spec_nl, domain="rtl_patterns")
        rtl_code = self.llm.generate(
            prompt=f"Generate Verilog for: {spec_nl}",
            context=context
        )
        lint_result = self.eda_tools.run_lint(rtl_code)
        if lint_result.errors:
            rtl_code = self.iterative_fix(rtl_code, lint_result)
        return rtl_code

    def verify_design(self, rtl_code, spec):
        strategy = self.llm.plan_verification(spec)
        testbench = self.llm.generate_testbench(rtl_code, strategy)
        sim_result = self.eda_tools.run_simulation(rtl_code, testbench)
        if not sim_result.all_pass:
            diagnosis = self.llm.diagnose_failure(sim_result.log)
            self.memory.store("verification_failure", diagnosis)
            return self.verify_design(rtl_code, spec)
        return sim_result

    def synthesize(self, rtl_code, constraints):
        synth_script = self.llm.generate_synth_script(constraints)
        ppa = self.eda_tools.run_synthesis(rtl_code, synth_script)
        if not ppa.meets_targets(constraints):
            optimization = self.llm.suggest_optimization(ppa, constraints)
            return self.synthesize(optimization.new_rtl, constraints)
        return ppa
</code>

===== Methodological Taxonomy =====

The survey categorizes agentic EDA approaches by paradigm:

^ Paradigm ^ Description ^ Example Systems ^
| SFT (Supervised Fine-Tuning) | LLMs fine-tuned on EDA-specific data | DRC-Coder |
| MAS (Multi-Agent Systems) | Multiple specialized agents collaborating | MAVF, REvolution |
| PRT (Planner-Reporter-Tool) | Orchestrated pipeline with tool access | ChatEDA |
| Evolutionary Agents | Iterative design space exploration | REvolution |

===== Representative Systems =====

^ Stage ^ System ^ Key Technology ^ Metrics ^
| Frontend | Chip-Chat | Conversational RTL generation | Code correctness |
| Verification | DRC-Coder | Multi-agent VLM for layout DRC | F1 score, time/cost |
| Verification | MAVF | Multi-agent spec-to-testbench | Coverage, correctness |
| Backend | ChatEDA | Multi-agent orchestration | WNS/TNS, power |
| Backend | REvolution | Evolutionary agent optimization | PPA improvement |
| Backend | TransPlace | GNN + transfer learning | Congestion, timing |

===== Agentic EDA Architecture Diagram =====

<mermaid>
flowchart TD
    A[Design Specification] --> B[Perception Layer]
    B --> C[Semantic Understanding]
    C --> D[Cognition Layer]
    D --> E[ReAct Planning]
    D --> F[CoT Reasoning]
    D --> G[Domain RAG]
    E --> H[Action Layer]
    F --> H
    G --> H
    H --> I[RTL Generation]
    H --> J[Verification]
    H --> K[Synthesis]
    I --> L[EDA Tool Sandbox]
    J --> L
    K --> L
    L --> M{Meets Constraints?}
    M -->|No| D
    M -->|Yes| N[Design Signoff]
</mermaid>

===== Open Challenges =====

  * **Tool Interface Fragmentation:** The survey calls for an Open Agentic EDA Standard API to unify tool interfaces across vendors
  * **Black-Box Legacy Tools:** Many EDA tools lack programmatic interfaces suitable for agent interaction
  * **End-to-End Benchmarks:** Need for standardized benchmarks like ChiPBench that measure PPA, QoR, and cost holistically
  * **Security:** Agent-vs-agent adversarial scenarios in design verification require new safety frameworks
  * **Federated Learning:** Privacy-preserving collaboration across design teams and foundries

===== References =====

  * [[https://arxiv.org/abs/2512.23189|Dawn of Agentic EDA: A Survey on Autonomous Agents for Electronic Design Automation (arXiv:2512.23189)]]
  * [[https://arxiv.org/abs/2507.21694|A Multi-Agent Generative AI Framework for IC Module-Level Verification Automation (arXiv:2507.21694)]]

===== See Also =====

  * [[agent_resource_management|Agent Resource Management: AgentRM]]
  * [[api_tool_generation|API Tool Generation: Doc2Agent and LRASGen]]
  * [[agent_rl_training|Agent RL Training: Agent-R1 and RAGEN]]